Small examples
Introduction
Hardware
Blinky
Nios II
Dhrystone
ChibiOS/RT
FatFs
Download
 

Introduction

These examples can be used for a starting point for your own work. I will provide you some examples such as:

  • Blinky, like a "Hello World" only for FPGA
  • Nios II
  • Nios II and Dhrystone
  • Nios II and ChibiOS/RT
  • Nios II and FatFs

Hardware

For these examples the following boards was used:

Altera DE1
 

Altera DE0-Nano
 

Altera DE0-CV
 

Altera DE1-SoC
 

Unfortunately the DE0-CV board is not equipped with a RS232 connector. Therefore we need a PS/2 to UART TTL adapter. My selfmade adapter looks like:

Blinky

This is a pure VHDL example without any CPU support. With the user LEDs a chaser was realized. On the 7-Segment display a counter is running.

Nios II

This example use the Nios II/e cpu and external SDRAM for the program memory. The functionality of the program is the same like my ARM examples.

Dhrystone

Dhrystone is a synthetic computing benchmark program developed in 1984 by Reinhold P. Weicker.

ChibiOS/RT

A Nios II/e system using external SDRAM, with counters on the 7-Segment display, a chaser and UART output if available.

FatFs

FatFs is a generic FAT file system module for small embedded systems. More info about FatFs can be found here

Download

Here are some examples for use with Altera Quartus II:

  Quartus II Blinky NiosII Drhystone ChibiOS/RT FatFs
Altera DE1 11.1sp2 yes yes yes yes yes (1)
Altera DE2 11.1sp2 yes --- --- --- ---
Altera DE0-Nano 11.1sp2 yes yes yes yes ---
Altera DE2-115 11.1sp2 yes --- --- --- ---
Altera DE0-CV 15.0.2 yes yes yes yes ---
Altera DE1-SoC 15.0.2 yes yes --- --- ---
Terasic DE10-Lite 15.0.2 yes --- --- --- ---
Cyclone V GX Starter Kit 15.0.2 yes --- --- --- ---

(1) With 1-Bit hardware SPI

And here are some examples for use with Xilinx Vivado (2019.1):

Arty A7 Blinky tested with a Arty A7-35T development board (Artix-7)