RISC-V
DE0-Nano reference
Ozone and NEORV32
SEGGER Embedded Studio
NEORV32
J-Link EDU vs. OpenOCD
JTAG Terasic Adapter
Small examples
  DE0-Nano reference

My reference design for a DE0-Nano board with a NEORV32.

Ozone and NEORV32

Debugging a RISC-V application inside a NEORV32 with Ozone the J-Link Debugger.

SEGGER Embedded Studio

Using SEGGER Embedded Studio for the software development with NEORV32.

NEORV32

The NEORV32 RISC-V Processor for Intel FPGA boards.

J-Link EDU vs. OpenOCD

My experience with J-Link EDU and OpenOCD.

JTAG Terasic Adapter

For the easier use of JTAG there is now an adapter available.

Small Examples

These examples here can be used for a starting point for your own work with the NEORV32.
I will provide you some small examples for the Intel FPGA boards.