Ozone (C5SoC)
Prepare and build de1socinit
Build the application
How to debug?

(1) Altera DE1-SoC GHRD


In this tutorial I will show you how to use Ozone to debug a Cyclone V SoC application.

Ozone is a full-featured graphical debugger for embedded applications. With Ozone it is possible to debug any embedded application on C source and assembly level. Ozone can load applications built with any toolchain / IDE or debug the target's resident application without any source. Ozone includes all needed debug information windows and makes use of the best performance of J-Link debug probes. The user interface is designed to be used intuitively and is fully configurable. All windows can be moved, re-sized and closed to fit the need of any developer. (Source: Segger)

Some preparations are needed for debugging in the external RAM of the Cyclone V SoC. Before the debugging session can start in the external RAM, the memory interface and the CPU must be initialized. This is not limited to the Cyclone V SoC itself, this is normal for the CPU architecture where external RAM is used. E.g. in case of Linux, a so called "second level" bootloader and "U-Boot" is used to initialize the CPU and the memory interface. After this process an application, Linux, can be executed in the external RAM.

Here I want to debug a "Bare Metal" application. The debugger must do the job and initialize the CPU before the start of the application. But Ozone itself cannot handle this task alone.

Therefore, a program is started before the actual debug session which will handle the initialisation process of the CPU.


Here an Altera DE1-SoC Board was used:

Unfortunately the DE1-SoC board is not equipped with a 20pin JTAG connector. Therefore we need an adapter. My selfmade adapter looks like:

The following wiring is needed:

 DE1-SoC J5  JTAG 20pin
 Pin 1  Pin 9
 Pin 2  Pin 12 (GND)
 Pin 3  Pin 13
 Pin 4  Pin 1
 Pin 5  Pin 7
 Pin 6  Pin 15
 Pin 7  NC
 Pin 8  Pin 3
 Pin 9  Pin 5
 Pin 10  Pin 4 (GND)

If pin 2 of the DE1-SoC J5 is set to GND, the On-Board USB Blaster is disabled.


At the time of creating this tutorial, the following software was installed:

Prepare and build de1socinit

The "second level" bootloader will be used to initialize the CPU for the debug session. Here we will build a modified bootloader which will be used to initialize the CPU only. To build this bootloader, the code generated by the BSP-Editor and parts of the the "Minimal Preloader (MPL)" are used.

The BSP-Editor is used to generate a normal bootloader, the BOOT_FROM_QSPI option was used. For more information please take a look at RocketBoards here. The generated source from this preloader is part of the GHRD design too.

The next part which is needed is the modified MPL source which can be find in the download section, "de1socinit.zip".

Assuming you have already installed the GHRD project in the "C:\my_design\de1soc-ghrd" folder. Download the "de1socinit.zip" file and store and extract the ZIP file inside the "C:\my_design\de1soc-ghrd\hw\software" folder. The result should look like:

Open the "SoC EDS 15.0 Command Shell", change to the de1socinit folder and use make:

After the build process the content of the de1socinit folder should look like:

Congratulation, you have created successful the "second level" bootloader de1socinit.

Build the application

Here I does not use the EDS environment. If you do not have a working Bare Metal ARM built environment install the Windows build tools and GCC ARM Embedded Toolchain before.

Download the "de1soctest.zip" file and store and extract the ZIP file inside the "C:\my_design\de1soc-ghrd\hw\software" folder. The result should look like:

de1soctest is the application here. Open the command line, change to the de1soctest folder and use make:

After the build process the content of de1soctest folder should look like:

The application has been successfully created, and we can start the debug session.

How to debug?

First of all make sure that the GHRD for the Altera DE1-SoC board is installed and running. If the design is not running, take a look here for how to program the FPGA.

Connect the J-Link to the PC and to the DE1-SoC (do not forget to power the target) and start Ozone. Use "File / Open..."

and select the "de1soctest.jdebug" file inside the de1soctest folder. Ozone should look like:

(Click inside the picture to expand)

Here you can see main.c from the de1soctest application. Ozone is prepared to start the debug session of de1soctest now. Press the "Start" button or F5 to start the debugger:

Ozone should look like:

(Click inside the picture to expand)

Now we are ready to debug the de1soctest application. You can step through the code with the following buttons:

Step Over (F10)

Step Into (F11)

Take a look at the "Local Data" window. After seven steps (F10) the windows should look like:

And the source window:

With the seven steps from above, the variables was set. And the next line will be
fa = fa + fd.

Note: The line which is highlighted is not yet executed This will be done with the next step.

How to set a breakpoint?

Setting a breakpoint is very easy. Click at the gray dot at the left of the line number:

Click at the gray dot in line 89, fa = fa + 2.6, a breakpoint will be set:

The red dot is the new breakpoint. You can remove the breakpoint by clicking on it again. Now we want to resume, press the "Resume" button or (F5):

The program will be executed and it will stop at the breakpoint:

The value of the variables was changed to a = 17, b = 3, c = 20.

You can stop the debug session by pressing the "Stop" button:

This was now a quick introduction how to use Ozone to debug a Cortex-A9 application.


de1socinit v20161220, for use with the EDS Command Shell (45 KB)

de1soctest v20161222, for use with the GNU ARM Embedded Toolchain (79 KB)